An Efficient and Reconfigurable Synchronous Neuron Model

نویسندگان
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A spiking neuron model for synchronous flashing of fireflies.

Certain species of fireflies show a group behavior of synchronous flashing. Their synchronized and rhythmic flashing has received much attention among many researchers, and there has been a study of biological models for their entrainment of flashing. The synchronous behavior of fireflies resembles the firing synchrony of integrate-and-fire neurons with excitatory or inhibitory connections. Thi...

متن کامل

HSRA: High-Speed, Hierarchical Synchronous Reconfigurable Array

This paper from the Berkeley BRASS group was all about performance: Is it possible to design an FPGA architecture that can compete with processors and ASICs in terms of clock frequency? FPGAs were (and still are) running at 5x – 10x slower clock frequency, largely due to the effect of configurability on both logic and interconnect delay. Von Herzen’s [1997] paper provided a sense of what was po...

متن کامل

An Efficient Implementation of a Realistic Spiking Neuron Model on an FPGA

Hardware implementations of spiking neuron models have been studied over the years mainly in researches focused on bio-inspired systems and computational neuroscience. This introduced considerable challenges for researchers particularly in terms of the requirements to realise a efficient embedded solution which may provide artificial devices adaptability and performance in real-time environment...

متن کامل

Hydra: An Energy-efficient and Reconfigurable Network Interface

In heterogeneous tiled System-on-Chip architectures a Network-on-Chip is used to transport messages between processing elements. A reconfigurable network interface is used to connect the processing elements to the Network-on-Chip, converting the messages between both domains. This paper introduces the Hydra: a network interface for the MONTIUM TP, a coarse-grained reconfigurable processor desig...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: IEEE Transactions on Circuits and Systems II: Express Briefs

سال: 2018

ISSN: 1549-7747,1558-3791

DOI: 10.1109/tcsii.2017.2697826